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TS634
DUAL WIDE BAND OPERATIONAL AMPLIFIER FOR ADSL LINE INTERFACE
s LOW NOISE : 3.2nV/Hz, 1.5pA/Hz s HIGH OUTPUT CURRENT : 160mA min. s VERY LOW HARMONIC AND INTERMODULATION DISTORTION
s HIGH SLEW RATE : 40V/s s SPECIFIED FOR 25 LOAD
DESCRIPTION This device is particularly intended for applications where multiple carriers must be amplified simultaneously with very low intermodulation products. It has been mainly designed to fit with ADSL chip-set such as ST70134 or ST70135. The TS634 is a high output current dual operational amplifier, with a large gain-bandwidth product (130MHz) and capable of driving a 25 load at 12V power supply. The TS634 is fitted out with Power Down function in order to decrease the consumption. The TS634 is housed in SO20 batwing plastic package for a very low thermal resistance.
SO20 batwing - Top View
Power Down 1
D SO20 Batwing (Plastic Micropackage)
ORDER CODE
Part Number TS634ID Temperature Range -40, +85C Package D * P
D=Small Outline Package (SO) - also available in Tape & Reel (DT)
PIN CONNECTIONS (top view)
1 2 3 4 5 6 7 8 9 10
20
Vcc+ 1 Output 1 VccVcc Vcc Vcc Vcc GND
Inverting input 1
Non-inverting input 1 Vcc Vcc Vcc Vcc Non-Inverting input 2 Inverting input 2 Power Down 2
_ +
19 18 17 16 15 14
Thermal Heat Tabs connected to -Vcc
Thermal Heat Tabs connected to -Vcc
+ _
13
APPLICATION
12 Output 2 11
Vcc+ 2
s UPSTREAM line driver for Asymmetric Digital
Subscriber Line (ADSL) (NT).
March 2003
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TS634
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vid Vin Toper Tstd Tj Supply voltage
1) 2)
Parameter
Value 7 2 6 -40 to +85 -65 to +150 150 25 45 2.7
Unit V V V C C C C/W C/W W
Differential Input Voltage Input Voltage Range
3)
Operating Free Air Temperature Range TS634 TS634ID Storage Temperature Maximum Junction Temperature
SO20-Batwing Rthjc Thermal Resistance Junction to Case Rthja Pmax. Thermal Resistance Junction to Ambient Area Maximum Power Dissipation (@25C)
1. All voltages values, except differential voltage are with respect to network terminal. 2. Differential voltages are non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of input and output voltages must never exceed VCC +0.3V.
OPERATING CONDITIONS
Symbol VCC Vicm Supply Voltage Common Mode Input Voltage Parameter Value 2.5 to 6 (VCC) +2 to (VCC ) -1
+
Unit V V
APPLICATION: ADSL LINE INTERFACE
ASCOT ADSL CHIP-SET
TX
emission LP filter (analog signal)
TS634 Line Driver
upstream
ST70135
ST70134
Power Down
HYBRID CIRCUIT
RX
reception (analog signal)
twisted-pair telephone line
VGA
downstream
TS636 Receiver
4-bit Gain Control
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TS634
ELECTRICAL CHARACTERISTICS VCC = 6Volts, Tamb = 25C (unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
DC PERFORMANCE
Vio
Iio Differential Input Offset Voltage Input Offset Current Tamb = 25C Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. Vic = 2V to 2V, Tamb Tmin. < Tamb < Tmax. Vic = 6V to 4V, Tamb Tmin. < Tamb < Tmax. No load, Vout = 0 90 70 70 50 14 mA 88 dB 108 5 0.2 6 3 5 15 30 mV A A
Iib
Input Bias Current
CMR
Common Mode Rejection Ratio
dB
SVR ICC
Supply Voltage Rejection Ratio Total Supply Current per Operator
DYNAMIC PERFORMANCE
VOH VOL High Level Output Voltage Low Level Output Voltage Iout = 160mA RL connected to GND Iout = 160mA RL connected to GND Vout = 7V peak RL = 25, Tamb Tmin. < Tamb < Tmax. GBP SR Isink Isource M14 M6 Gain Bandwidth Product Slew Rate Output Current Phase Margin at AVCL = 14dB Phase Margin at AVCL = 6dB AVCL = +7, f = 20MHz RL = 100 AVCL = +7, RL = 50 Vid = 1V, Tamb Tmin. < Tamb < Tmax. RL = 25//15pF RL = 25//15pF 23 160 140 60 40 6500 5000 130 40 MHz V/s mA 4 4.5 -4.5 -4 V V
AVD
Large Signal Voltage Gain
11000
V/V
NOISE AND DISTORTION
en in THD Equivalent Input Noise Voltage Equivalent Input Noise Current Total Harmonic Distortion f = 100kHz f = 100kHz Vout = 4Vpp, f = 100kHz AVCL = -10 RL = 25//15pF F1 = 80kHz, F2 = 70kHz Vout = 8Vpp, AVCL = -10 Load = 25//15pF F1 = 80kHz, F2 = 70kHz Vout = 8Vpp, AVCL = -10 Load = 25//15pF 3.2 1.5 -69 nV/Hz pA/Hz dB
IM2-10
2nd Order Intermodulation Product
-77
dBc
IM3-10
3rd Order Intermodulation Product
-77
dBc
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TS634
POWER DOWN MODE VCC = 6Volts, Tamb = 25C
Symbol Vpdw Iccpdw Rpdw Cpdw Total Power Down Mode Current Consumption Power Down Mode Ouput Impedance Power Down Mode Output Capacitance STANDBY CONTROL operator 1 Vhigh level Vhigh level Vlow level Vlow level operator 2 Vlow level Vhigh level Vlow level Vhigh level Parameter Thershold Voltage for Power Down Mode Low Level High Level Min. Typ. 0 3.3 1.4 33 OPERATOR STATUS operator 1 Standby Standby Active Active operator 2 Active Standby Active Standby Max 0.8 150 Unit V A pF
2
POWER DOWN EQUIVALENT SCHEMATIC
3rd ORDER INTERMODULATION 2 tones : 70kHz and 80kHz
Vcc + + _ Vcc -
. .
POWER DOWN
0
IM3 (dBc)
.. .
-10 -20
Ouput
-30 -40 -50
230kHz 90kHz
-60 -70
OUPUT IMPEDANCE IN POWER DOWN MODE In Power Down Mode the output of the driver is in "high impedance" state. It is really the case for the static mode. Regarding the dynamic mode, the impedance decreases due to a capacitive effect of the collector-substrat and base collector junction. The impedance behaviour comes capacitive, typically: 1.4M // 33pF. INTERMODULATION DISTORTION The curves shown below are the measurements results of a single operator wired as an adder with a gain of 15dB. The operational amplifier is supplied by a symmetric 6V and is loaded with 25. Two synthesizers (Rhode & Schwartz SME) generate two frequencies (tones) (70 & 80kHz or 180 & 280kHz). An HP3585 spectrum analyzer measures the spurious level at different frequencies. The curves are traced for different output levels (the value in the X axis is the value of each tone). The output levels of the two tones are the same. The generators and spectrum analyzer are phase locked to enhance measurement precision.
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-80 -90 -100 1 1,5 2
60kHz 220kHz
2,5
3
3,5
4
4,5
Vout peak (V)
2 tones : 180kHz and 280kHz
0 -10 -20 -30
IM3 (dBc)
-40 -50 -60 -70 -80 -90 -100 1 1,5 2 2,5
80kHz 380kHz
640kHz 740kHz
3
3,5
4
4,5
Vout peak (V)
TS634
Closed Loop Gain and Phase vs. Frequency Gain=+2, Vcc=6V, RL=25 Closed Loop Gain and Phase vs. Frequency Gain=+6, Vcc=6V, RL=25
10
200
20
200
Gain
15 0 100 Phase (degrees) 10
Gain
100 Phase (degrees)
Gain (dB)
-10
Phase
Gain (dB)
5 0 -5
0
Phase
0
-20
-100
-10 -15
-100
-30
-200
-20
-200
10kHz
100kHz
1MHz
10MHz
100MHz
10kHz
100kHz
1MHz
10MHz
100MHz
Frequency
Frequency
Closed Loop Gain and Phase vs. Frequency Gain=+11, Vcc=6V, RL=25
Equivalent Input Voltage Noise Gain=+100, Vcc=6V, no load
30
200
20
Gain
20 100
15 en (nV/VHz)
+ _
10k
10
Phase
0 -10 -20 -30 0
Phase (degrees)
Gain (dB)
10
100
-100
5
-200
0 100Hz 1kHz 10kHz 100kHz 1MHz Frequency
10kHz
100kHz
1MHz 10MHz Frequency
100MHz
Maximum Output Swing Vcc=6V, RL=25
Channel Separation (Xtalk) vs. Frequency XTalk=20Log(V2/V1), Vcc=6V, RL=25
5 4 3 2
VIN
-10
output
-20 -30
+ 49.9 _
V1
1k 25
100
+ 49.9 _
swing (V)
Xtalk (dB)
1 0 -1 -2 -3 -4 -5 0 2
input
-40 -50 -60 -70 -80 -90
V2
1k 25
100
4
6
8
10
-100
10kHz
100kHz
1MHz
10MHz
Time (s)
Frequency
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TS634
THE TS634 AS LINE DRIVER ON ADSL LINE INTERFACE. SINGLE SUPPLY IMPLEMENTATION WITH PASSIVE OR ACTIVE IMPEDANCE MATCHING. THE LINE INTERFACE - ADSL Remote Terminal (RT): The Figure1 shows a typical analog line interface used for ADSL service. On this note, the accent will be made on the emission path. The TS634 is used as a dual line driver for the upstream signal. Figure 1 : Typical ADSL Line Interface namic range between 0 and +12 V. Several options are possible to provide this bias supply (such as a virtual ground using an operational amplifier), such as a two-resistance divider which is the cheapest solution. A high resistance value is required to limit the current consumption. On the other hand, the current must be high enough to bias the inverting input of the TS634. If we consider this bias current (5A) as the 1% of the current through the resistance divider (500A) to keep a stable mid supply, two 47k resistances can be used. The input provides two high pass filters with a break frequency of about 1.6kHz which is necessary to remove the DC component of the input signal. To avoid DC current flowing in the primary of the transformer, an output capacitor is used. The this case the load impedance is 25 for each driver.
HYBRID CIRCUIT
high output current
emission (analog)
LP filter
upstream impedance matching
ST70135
ST70134
TS634 Line Driver
twisted-pair telephone line
reception (analog)
VGA
TS636 Receiver
downstream
For the ADSL upstream path necessary to avoid any distortion. In this simple non-inverting amplification configuration, it will be easy to implement a Sallen-Key lowpass filter by using the TS634. For ADSL over POTS, a maximum frequency of 135kHz is reached. For ADSL over ISDN, the maximum frequency will be 276kHz. INCREASING THE LINE LEVEL BY USING AN ACTIVE IMPEDANCE MATCHING With passive matching, the output signal amplitude of the driver must be twice the amplitude on the load. To go beyond this limitation an active maching impedance can be used. With this technique it is possible to keep good impedance matching with an amplitude on the load higher than the half of the ouput driver amplitude. This concept is shown in Figure 3 for a differential line. Figure 3 : TS634 as a differential line driver with an active impedance matching
For the remote terminal it is required to create an ADSL modem easy to plug in a PC. In such an application, the driver should be implemented with a +12 volts single power supply. This +12V supply is available on PCI connector of purchase. The Figure 2 shows a single +12V supply circuit that uses the TS634 as a remote terminal transmitter in differential mode. Figure 2 : TS634 as a differential line driver with a +12V single supply
1 100n + +12V 1k _ +12V GND R2 12.5 10n
Vi
1:2
47k
1/2 R1
Vo
Vcc/2
1
25 Vo
Hybrid & Transformer
100n
100
Vcc+ 1k
+ _
Vcc+ GND
Rs1
10n
1/2
R1
Vi
1k
10
47k 100n + _
GND
R3 +12V
GND
Vi
1/2 R1
R2
Vo Vo
1:n
Hybrid & Transformer
12.5
R3 Vcc/2
RL Vo
100
100n
1/2 R1
R5
Vi
1k
10
100n
GND
+ _
R4 Vcc+
GND
Vo
Rs2
The driver is biased with a mid supply (nominaly +6V), in order to maintain the DC component of the signal at +6V. This allows the maximum dy6/9
100n
TS634
Component calculation: Let us consider the equivalent circuit for a single ended configuration, Figure 4. Figure 4 : Single ended equivalent circuit By identification of both equations (2) and (3), the synthesized impedance is, with Rs1=Rs2=Rs:
Rs Ro = ---------------- ,( 4 ) R2 1 - -----R3
+
Rs1 Vi
Figure 5 : Equivalent schematic. Ro is the synthesized impedance
_
R2
Vo
Vo
Ro
Iout
-1
R3
1/2R1 1/2RL
Vi.Gi
1/2RL
Let us consider the unloaded system. Assuming the currents through R1, R2 and R3 as respectively:
2Vi - + -------- , ( Vi Vo ) and ( Vi Vo ) - ----------------------------------------------R2 R3 R1
As Vo equals Vo without load, the gain in this case becomes :
2R2 R2 1 + ---------- + -----Vo ( noload ) R1 R3 G = ------------------------------ = ---------------------------------Vi R2 1 - -----R3
Unlike the level Vo required for a passive impedance, Vo will be smaller than 2Vo in our case. Let us write Vo=kVo with k the matching factor varying between 1 and 2. Assuming that the current through R3 is negligeable, it comes the following resistance divider:
kVoRL Ro = --------------------------RL + 2Rs1
The gain, for the loaded system will be (1):
2R2 R2 1 + ---------- + -----1 R1 R3 Vo ( withload ) GL = ----------------------------------- = -- ---------------------------------- ,( 1 ) 2 R2 Vi 1 - -----R3
After choosing the k factor, Rs will equal to 1/2RL(k-1). A good impedance matching assumes:
1 R o = -- RL ,( 5 ) 2
As shown in figure5, this system is an ideal generator with a synthesized impedance as the internal impedance of the system. From this, the output voltage becomes:
Vo = ( ViG ) - ( RoIout ) ,( 2 )
From (4) and (5) it becomes:
2Rs R2 ------ = 1 - --------- ,( 6 ) R3 RL
By fixing an arbitrary value for R2, (6) gives:
R2 R3 = ------------------2Rs 1 - --------RL
with Ro the synthesized impedance and Iout the output current. On the other hand Vo can be expressed as:
2R2 R2 Vi 1 + ---------- + ------ R1 R3 Rs1Iout Vo = ---------------------------------------------- - --------------------- ,( 3 ) R2 R2 1 - -----1 - -----R3 R3
Finally, the values of R2 and R3 allow us to extract R1 from (1), and it comes:
2R2 R1 = --------------------------------------------------------- ,( 7 ) R2 R2 2 1 - ------ GL - 1 - ----- R3 R3
with GL the required gain.
GL (gain for the loaded system) R1 R2 (=R4) R3 (=R5) Rs GL is fixed for the application requirements GL=Vo/Vi=0.5(1+2R2/R1+R2/R3)/(1-R2/R3) 2R2/[2(1-R2/R3)GL-1-R2/R3] Abritrary fixed R2/(1-Rs/0.5RL) 0.5RL(k-1)
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TS634
CAPABILITIES The table below shows the calculated components for different values of k. In this case R2=1000 and the gain=16dB. The last column displays the maximum amplitude level on the line regarding the TS634 maximum output capabilities (18Vpp diff.) and a 1:2 line transformer ratio.
Active matching R1 () 820 490 360 270 240 Passive R3 () Rs () TS634 Output Level to get 12.4Vpp on the line (Vpp diff) 8 8.7 9.3 9.9 10.5 12.4 Maximum Line level (Vpp diff) 27.5 25.7 25.3 23.7 22.3 18
MEASUREMENT OF THE POWER CONSUMPTION Conditions: Power Supply: 12V Passive impedance matching Transformer turns ratio: 2 Maximun level required on the line: 12.4Vpp Maximum output level of the driver: 12.4Vpp Crest factor: 5.3 (Vp/Vrms) The TS634 power consumption during emission on 900 and 4550 meter twisted pair telephone lines: 450mW
k
1.3 1.4 1.5 1.6 1.7
1500 3.9 1600 5.1 2200 6.2 2400 7.5 3300 9.1 matching
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TS634
PACKAGE MECHANICAL DATA 20 PINS - PLASTIC MICROPACKAGE (SO)
Millimeters Dim. Min. A a1 a2 b b1 C c1 D E e e3 F L M S 0.1 0.35 0.23 0.5 45 (typ.) 12.6 10 1.27 11.43 7.4 0.5 7.6 1.27 0.75 8 (max.) 0.291 0.020 13.0 10.65 0.496 0.394 Typ. Max. 2.65 0.3 2.45 0.49 0.32 Min. 0.004 0.014 0.009
Inches Typ. Max. 0.104 0.012 0.096 0.019 0.013 0.020 0.512 0.419 0.050 0.450 0.299 0.050 0.030
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com
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